The invention relates to a semiconductor device having a semiconductor body comprising at least a surface-adjoining island:shaped region which is bounded by a sunken dielectric and in which a transistor and a resistive zone are provided with a first semiconductor region of a first conductivity type which comprises a collector region of the transistor. An overlying, surface-adjoining second semiconductor region of a second conductivity type opposite to the first comprises a base of the transistor and the resistive zone, and at least a third and a fourth surface region of the first conductivity typeare present which form emitter regions of the transistor. The resistive zone comprises a part of the second semiconductor region between two connections to the semiconductor region of which a first connection also forms the base contact of the transistor, the third surface region of the first conductivity type which forms an emitter region being present between the two connections.
Such semiconductor devices are used in bistable memory cells having two transistors with two emitters for memory matrices in the so-called emitter coupled logic. The base and the collector regions of the two transistors are coupled crosswise, while the collector regions are connected to a first supply line via resistors which serve as loads. An emitter region of each transistor is connected to a second supply line, and the two other emitter regions are connected to a first and a second read and write line, respectively.
A semiconductor device of the above-mentioned type is known from French patent application No. 2,413,782. The resistive zone is formed by a lateral extension of the base zone of the transistor. In a memory cell composed of such semiconductor devices, one of the emitter regions of each transistor is integrated in a lateral extension of the base region which serves as a resistive zone. Such a device configuration is advantageous because it contributes to a considerable decrease of the dimensions of the cells with respect to those of the cells with a similar structure in which the emitter regions and the resistors are all accommodated in separate parts of the base region. However, such a device has the disadvantage that by integration of the emitter in the resistive zone the cross-section of the resistive zone is reduced over a part of its length. In order to avoid reducing the cross-section over the length considered to only that of the narrow space between the emitter region and the underlying collector region - in which space the resistivity of the semiconductor material is high due to its deep location the emitter region is divided into two separate zones. In this manner a channel has been provided therebetween in a piece of semiconductor material which encloses the surface layers in which the material has a much lower resistivity than that in the said deep-situated narrow space and it becomes possible to combine the integration of the emitter in the resistive zone and to obtain an ohmic value suitable for said resistor.
However, such a measure necessitates the widening of the integration island for accommodating the channel. In other words the surface thereof has to be incresed, which is contradictory to the object in the field of integrated circuits, and in particular for memory circuits, of an ever larger integration density.
One has to take into account on the one hand the width of the channel itself, which in series production due to the normally permitted tolerances, in particular those on the dimensions of the mask apertures, may not be smaller than 3 .mu.m, and on the other hand the fact that the two emitter zones which surround the channel further adjoin edges of the sunken dielectric which laterally bound the island-shaped region. As every zone must be given a sufficient width according to a direction transverse to the edges and parallel to the transverse direction of the channel so that with a maximum mutual alignment error of the masks which are used to form first of all the edge and then the zones, one of these does not become too narrow and for the greater part is embedded in the dielectric, which would involve an unacceptable reduction of the overall area of the emitter, one is compelled to choose the width of the island to be 30 to 40% larger than in the absence of the channel.